Posts by Collection

portfolio

RISC-V CPU Design

Fully pipelined RISC-V CPU design (ALU, RegFile, Datapath, Control) in logic gate simulator

publications

Goldeneye AB1

Published in The NASA Aeronautics University Design Challenge 2016-2017, 2017

GoldeneyeAB1 was a prize winning white-paper submission to the NASA Aeronautics Design Challenge.

Recommended citation: R. Anand, A. English, D. Gao, S. Malekshahi, R. Sinha, N. Stevenson (2017). "Goldeneye AB1" NASA Aeronautics Design Challenge. http://goldeneyerohan.github.io/files/GoldeneyeAB1.pdf

talks

Goldeneye presents at Aptiv

Published:

As president and project-lead of the Goldeneye student engineering team at Berkeley, I had a great time presenting a year’s worth of projects in autonomous driving with my teammates at Aptiv. A big shout-out goes to Aptiv for sponsoring our work.

teaching

Teaching experience 1

Undergraduate course, University 1, Department, 2014

This is a description of a teaching experience. You can use markdown like any other post.

Teaching experience 2

Workshop, University 1, Department, 2015

This is a description of a teaching experience. You can use markdown like any other post.

technicalreports